Low clock phase noise and jitter are critical to system design success.

System Vendors

Consumer • Military • Communications • Medical • Wireless • RF/Microwave • etc.

Create your own standards for clock performance, then verify compliance.

Whether you need a high-precision clock source or simply one that's "good enough," use our service to evaluate and select the right parts for new designs, with minimal effort. We'll help you reduce development time and expense, minimize failures in the field, and reduce BOM costs.

Set a standard. Verify compliance. Focus more time on your core business.

New to our service? Read an overview of How It Works.

What can I do with the JitterLabs app?

  • Create a specification defining performance requirements for clock and timing sources.
  • Share your specification with suppliers so they can recommend compliant devices.
  • Or, review the Test Report library for devices to analyze yourself.
  • If you can't find what you're looking for in the library, contact us or your suppliers to request Test Reports be created.
  • If needed, request and obtain permission to access Test Reports owned by others.
  • Apply your specification to Test Reports to determine compliance.
  • Compare performance of different products, apples-to-apples.
  • Create PDF reports for management and procurement teams to drive decisions.
  • Use compliance results as part of your internal business process to qualify timing devices.
  • Protect your content by configuring security features, such as blacklisting your competitors.
  • And more...
access jitter, phase noise, and other timing noise measurements for clock and timing sources online

Compare performance, apples-to-apples

Our service is designed from the ground-up to easily compare device performance, apples-to-apples. We use a consistent methodology to derive results from our independent test data. And, we document our test procedures and post-processing steps so you can easily understand and use the data we provide. Still have questions? Contact us anytime, we're here to help.

Compare phase noise and jitter performance between different manufacturers.

Be your own standard

The traditional approach to selecting products is to compare your system's requirements with timing-device data sheet specifications. We think the reverse makes more sense — verifying a device's performance complies with your system's specifications.

This places you in the driver's seat, because it requires manufacturers to show compliance to your specifications, rather than the other way around.

Inform suppliers of jitter, phase noise, timing requirements

Due to the huge number of timing devices and applications they serve, there hasn't been a way to automate this on a large scale, until now. Using our service, any business can create a specification for their system or product, and evaluate it to any timing device having a Test Report.

The process is simple: create a specification, apply it to one or more Test Reports, compare results, then select the right product for your design. And it's all done online, quick and easy.

Streamline your evaluation process by requesting Test Reports from suppliers today.

Create custom specifications

Create a specification in the JitterLabs app to capture system-level requirements for clock and timing sources.

Then, apply it to Test Reports to determine compliance. Or, share your specification with suppliers so they can recommend compliant devices.

Specifications can be created from a wide variety of test metrics, as shown in the following drop-down lists.


or, Apply specifications shared by others

Specifications written by the community are stored in a Specification Library. When you create a specification, your organization owns it, and can share share it (or not) with other organizations that you choose. Sharing a specification is a great way to establish technical leadership in the community. Many clock/timing specifications already exist for various products and industry standards, including the following from JitterLabs.

  • 100GBASE-KR4/CR4/KP4/LR4/ER4/CR10/SR10
  • 40GBASE-CR4/SR4/FR/KR4/LR4/SR4
  • 1000BASE-KX/PX/BX10/LX10
  • 100BASE-BX10/LX10
  • IEEE 802.1AS-2011
  • FC-PI-6 (32G/128G)
  • FC-PI-5 (4G/8G/16G)
  • SFF-8431 (SFP+)
  • INF-8077i (XFP)
  • CEI-25G-LR
  • CEI-11G-SR/MR/LR
  • CEI-6G-SR/LR
  • Stratix V
  • Cyclone V
  • Arria 10
  • Virtex UltraScale/UltraScale+
  • Kintex UltraScale/UltraScale+
  • SONET (OC-48/192/768)
  • USB 3.1
  • SMPTE (259M/292M/424M)
  • DOCSIS 3.1
  • IESS (308/309)
  • AES-12id-r2011
  • JESD204B (SxI5/6G/11G)
  • ...

Applying an existing specification to Test Reports to determine compliance is an easy way to compare device performance, apples-to-apples. Want to change the tests or limits in a specification? Feel free to copy and modify any publicly shared specification owned by JitterLabs. For other organizations, you just need to obtain their permission first.

Oh, and a function library exists as well, with all the same features.

Simplify internal qualifications

Integrate our service with your internal business process for qualifying timing devices. Our service provides a consistent, reliable, and transparent methodology that can be adopted across your entire organization.

You can (1) create specifications for system-level timing requirements and request suppliers to show compliance, and/or (2) request that clock-dependent device vendors create specifications for their own products and share them with you to help you select compliant timing products.

Inform suppliers of jitter, phase noise, timing requirements

For example, the IEEE-100GBASE-KR4/CR4 specification shows how much margin timing devices provide to the high-speed serial-data jitter requirements of 100GBASE-KR4/CR4. Similarly, the US-GTY-CPLL-REFCLK-60-234M specification captures Xilinx FPGA UltraScale and UltraScale+ CPLL reference-clock data-sheet requirements for GTY transceivers, which may be used to build 100GBASE-KR4/CR4 systems.

Compliance Statement for Xilinx UltraScale products


(system-level spec)

Compliance Statement for IEEE 100GBASE-KR4/CR4

Xilinx UltraScale/UtraScale+

(chip-level spec)

You can evaluate timing devices to both chip- and system-level requirements, and select a compliant part to ensure first-pass design success.

Analyze the entire signal path

Analyze the clock jitter that your system observes by correctly filtering it as it passes through the system. First, request that your suppliers save jitter-transfer models of their products in the Function Library and share them with your organization. Then, when you create or apply a system-level specification, retrieve their functions (e.g. H1, H2, or H3) to accurately model your system. Use analysis results to select a suitable timing device with the desired margin for your system.

model clock jitter using supplier functions for jitter transfer

Communicate technical requirements

Inform suppliers of jitter, phase noise, timing requirements

Create specifications that define the performance you require from timing devices. Then share them with your suppliers so they can evaluate their portfolios and recommend compliant products.

Or, share specifications to help suppliers define new products.

How to get started

  1. Register with the JitterLabs app.
  2. For new organizations, select a subscription plan (Free or Premium).
  3. Follow instructions to enroll as a member in a registered organization.
  4. Login to the app to review available Test Reports, specifications and functions.
  5. If needed, contact suppliers or JitterLabs to request Test Reports be created for interested timing devices not yet in the application.
  6. Select Test Reports to analyze.
  7. If needed, create specifications for your work and optionally share them with others.
  8. Apply specifications to Test Reports to create official Compliance Statements.
  9. Export test data or analysis results to other applications (e.g. Excel), or as custom PDF reports.
  10. Discover additional features by reviewing help documents and videos.