Chipsets require low input-clock phase noise and jitter to perform their best.

Clock-dependent Device Vendors

FPGAs • ASICs • PHYs • IP cores • Processors • Memories • etc.

Evaluate devices to your product's input-clock specifications. Quick. Easy. Online.

If your product requires a low-noise input clock to operate properly, our service makes it easy to verify compliance to its input-clock specifications. We'll help you recommend better, and more, timing devices to customers. This ensures your products perform their best in the field, and allows system vendors more flexibility in their designs. You can even publish approved-vendor lists (AVLs) in the JitterLabs app to notify customers of recommended devices.

New to our service? Read an overview of How It Works.

What can I do with the JitterLabs app?

  • Create a specification for your product's input-clock performance requirements.
  • Share your specification with suppliers so they can recommend compliant devices.
  • Or, review the Test Report library for devices to analyze yourself.
  • If you can't find what you're looking for in the library, contact us or your suppliers to request Test Reports be created.
  • If needed, request and obtain permission to access Test Reports owned by others.
  • Apply your specification to Test Reports to determine compliance.
  • Save PDF reports, such as Compliance Statements, for your records.
  • Identify timing devices to place on your approved vendor lists (AVLs).
  • Edit and publish AVLs for selected businesses to view.
  • Share functions describing how your products filter clock jitter, so customers can optimize their designs.
  • Protect your content by configuring security features, such as blacklisting your competitors.
  • And more...
access jitter, phase noise, and other timing noise measurements for clock and timing sources online

Be your own standard

The traditional approach to evaluating products is to compare your product's input-clock requirements with timing-device data sheet specifications. We think the reverse makes makes more sense. That is, verifying a device's performance complies with your product's specifications.

This places you in the driver's seat, because it requires manufacturers to show compliance to your specifications, rather than the other way around.

Inform suppliers of jitter, phase noise, timing requirements

Due to the huge variety of timing device and product combinations possible, there hasn't been a way to automate this on a large scale, until now. Using our service, any business can create a specification for their system or product, and evaluate it to any timing device having a Test Report.

The process is simple: create a specification, apply it to one or more Test Reports, and identify compliant devices. And it's all done online, quick and easy.

Simplify your evaluations by requesting Test Reports from timing vendors today.

Create custom specifications

Create a specification in the JitterLabs app to capture your product's clock-input requirements.

Then, apply it to Test Reports to determine compliance. Or, share your specification with suppliers or customers so they can recommend compliant devices.

Specifications can be created from a wide variety of test metrics, as shown in the following drop-down lists.

CATEGORY
MEASUREMENT
PARAMETER

or, Apply specifications shared by others

Specifications written by the community are stored in a Specification Library. When you create a specification, your organization owns it, and can share share it (or not) with other organizations that you choose. Sharing a specification is a great way to establish technical leadership in the community. Many clock/timing specifications already exist for various products and industry standards, including the following from JitterLabs.


  • 100GBASE-KR4/CR4/KP4/LR4/ER4/CR10/SR10
  • 40GBASE-CR4/SR4/FR/KR4/LR4/SR4
  • 10GBASE-CX4/DR/KX4/LRM/LX4/PR/PRX/SR/LR/ER/SW/LW/EW/T
  • 1000BASE-KX/PX/BX10/LX10
  • 100BASE-BX10/LX10
  • XLAUI/CAUI/XAUI
  • XLPPI/CPPI/nPPI
  • IEEE 802.1AS-2011
  • FC-PI-6 (32G/128G)
  • FC-PI-5 (4G/8G/16G)
  • SFF-8431 (SFP+)
  • INF-8077i (XFP)
  • CEI-28G-SR/MR/VSR
  • CEI-25G-LR
  • CEI-11G-SR/MR/LR
  • CEI-6G-SR/LR
  • Stratix V
  • Cyclone V
  • Arria 10
  • Virtex UltraScale/UltraScale+
  • Kintex UltraScale/UltraScale+
  • SONET (OC-48/192/768)
  • USB 3.1
  • SMPTE (259M/292M/424M)
  • DVB-S2X (DTH/VSAT)
  • DOCSIS 3.1
  • IESS (308/309)
  • AES-12id-r2011
  • JESD204B (SxI5/6G/11G)
  • ...

Applying an existing specification to Test Reports to determine compliance is an easy way to compare device performance, apples-to-apples. Want to change the tests or limits in a specification? Feel free to copy and modify any publicly shared specification owned by JitterLabs. For other organizations, you just need to obtain their permission first.

Oh, and a function library exists as well, with all the same features.

Streamline device validation

After applying a specification to one or more Test Reports, you can view (and save) the results as a Compliance Statement. Use these official statements as part of your internal business process for qualifying devices to support your products.

For example, the Stratix-V-REFCLK specification captures Altera's Stratix V FPGA data sheet requirements for a reference-clock. Click on the link to view a Compliance Statement that evaluates four devices to this specification.

After you identify devices that meet your requirements, inform customers by adding the devices to your Approved Vendor Lists (AVLs) directly within the JitterLabs app.

Help customers optimize designs

For products that filter input clock jitter, you can easily create functions in the JitterLabs app to describe their jitter filtering characteristics.

Then, securely share your functions with customers so they can more accurately analyze the effect of clock jitter on their systems, and optimize their designs.

First, second, and third-order s-domain (Laplace) functions can be created, for low and high pass characteristics.

Creating and sharing functions helps customers optimize their timing margins, making system failures in the field less likely.

create jitter transfer function

How to get started

  1. Register with the JitterLabs app.
  2. For new organizations, select a subscription plan (Free or Premium).
  3. Follow instructions to enroll as a member in a registered organization.
  4. Login to the app to review available Test Reports, specifications and functions in their respective libraries.
  5. If needed, contact suppliers or JitterLabs to request Test Reports be created for interested timing devices not yet in the application.
  6. If needed, use the app to request permission to access Test Reports owned by other organizations.
  7. Select Test Reports to analyze.
  8. If needed, create specifications for your products and optionally share them with others.
  9. Apply specifications to Test Reports to create official Compliance Statements.
  10. Identify timing devices to place on your approved vendor lists (AVLs).
  11. Edit/publish AVLs for customers to view.
  12. Export test data or analysis results to other applications (e.g. Excel), or as custom PDF reports.
  13. Create and share functions describing how your products filter clock jitter, so your customers can optimize their timing margins.
  14. Discover additional features by reviewing help documents and videos.